I think that the decision about headers is critical one. I if the headers style is not taken from RTEMS, I would suggest to fork svdtoheaders and add option with name
-S, --style=[nuttx,rtems]
which would default to NuttX for now.
The NuttX style is esp32c3_map.h:
#define ESP32C3_xxx_BASE 0x....
esp32c3_reg.h:
/* APB_CTRL - APB (Advanced Peripheral Bus) Controller */
#define ESP32C3_APB_CTRL_BASE 0x60026000
#define ESP32C3_APB_CTRL_SYSCLK_CONF_OFFSET 0x0000
#define ESP32C3_APB_CTRL_SYSCLK_CONF (ESP32C3_APB_CTRL_BASE + ESP32C3_APB_CTRL_SYSCLK_CONF_OFFSET)
#define ESP32C3_APB_CTRL_SYSCLK_CONF_PRE_DIV_CNT (0x3ff << 0) /* 000003ff: reg_pre_div_cnt */
#define ESP32C3_APB_CTRL_SYSCLK_CONF_PRE_DIV_CNT_MASK (0x3ff << 0)
#define ESP32C3_APB_CTRL_SYSCLK_CONF_CLK_320M_EN (1 << 10) /* 00000400: reg_clk_320m_en */
#define ESP32C3_APB_CTRL_SYSCLK_CONF_CLK_EN (1 << 11) /* 00000800: reg_clk_en */
#define ESP32C3_APB_CTRL_SYSCLK_CONF_RST_TICK_CNT (1 << 12) /* 00001000: reg_rst_tick_cnt */
#define ESP32C3_APB_CTRL_TICK_CONF_OFFSET 0x0004
#define ESP32C3_APB_CTRL_TICK_CONF (ESP32C3_APB_CTRL_BASE + ESP32C3_APB_CTRL_TICK_CONF_OFFSET)
#define ESP32C3_APB_CTRL_TICK_CONF_XTAL_TICK_NUM (0xff << 0) /* 000000ff: reg_xtal_tick_num */
#define ESP32C3_APB_CTRL_TICK_CONF_XTAL_TICK_NUM_MASK (0xff << 0)
So may it be we can stay with that…
Or more RTEMS style is to use GENMASK and BIT
/* Error Code Capture Register */
#define REG_ECC_DIR BIT(5)
#define REG_ECC_ERCC GENMASK(7, 6)
#define REG_ECC_FUNC GENMASK(4, 0)
#define REG_ECC_ERCC_BIT (0)
#define REG_ECC_ERCC_FORM (1)
#define REG_ECC_ERCC_STUFF (2)
#define REG_ECC_ERCC_OTHER (3)
In TMS570 we have followed style Chris Johns and Sebastian Huber from LPC
#define PCLKSEL0_PCLK_UART1_MASK 0x00000300U
#define GET_PCLKSEL0_PCLK_UART1( reg ) \
GET_FIELD( reg, PCLKSEL0_PCLK_UART1_MASK, 8 )
#define SET_PCLKSEL0_PCLK_UART1( reg, val ) \
SET_FIELD( reg, val, PCLKSEL0_PCLK_UART1_MASK, 8 )
But I would stay with single mask per register field and use of FIELD_GET and FIELD_PREP.
I would not use overlay and or packed structures. It is better to define offsets and then use some IO access inline functions. Like we do in ctucanfd. There is a problem that I have not found generic whole RTEMS applicable IO access wrappers, Which is not so big problem for in-order CPUs, but there should be such such defines with proper barriers where required.
I would suggest to keep only peripherals base addresses in the device specif central files and attempt to unique other peripherals in per peripheral files with only esp32_ prefix and if required, documented differences between variants. May it be with specific fields disable to catch access to fields which are not implemented on specific variant of peripheral. I do not think that there would be much such deviations except for central power management, clock and reset which are chip specific and depends on integrated peripherals set.
For sure, keeping redundant definitions for I2C0,1,2… and SPI1,2 etc. would be nightmare and unusable for common drivers. It would worth to use python to build databases from all SVD files available for ESP32Cx and learn it to generate common headers specific for given peripheral, ESP_SPI, ESP_I2C which would even check for differences between instances and variants and documents these differences. But here should be single driver for all I2C channels, same for I2S. There could be more problems with SPI, because there could be more diferences for these which provide execute in place (XIP) functionality.